Friday, October 7, 2011

make variables

When writing make rules, there's a certain set of vital cryptic syntax that is impossible to remember.

It always takes ages to find the definitions of these damned things which are unaccountably hidden deep in the manual, or remember what they're called, even though they're the one thing you always need when writing a makefile.

Make Automatic Variables

$@ target

$< first prerequisite

$^ all prerequisites

$* the stem from the pattern match in an implicit rule

These are the four that you always use, more can be found at:

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